A CMOS RF RMS Detector for

نویسندگان

  • Alberto Valdes-Garcia
  • Radhika Venkatasubramanian
  • Rangakrishnan Srinivasan
  • José Silva-Martinez
  • E. Sánchez-Sinencio
چکیده

This project involves the design of a CMOS RF RMS Detector that converts the RMS voltage amplitude of an RF signal to a DC voltage. Its high input impedance and small area make it suitable for the built-in-testing of critical RF blocks of a transceiver such as a Low Noise Amplifier (LNA) and Power amplifier (PA) without affecting their performance and with minimum area overhead. DESCRIPTION: The need to accelerate the time-to-market by providing a fast fault diagnosis during the product development phase and to reduce the cost of testing for high-volume manufacturing necessitates the development of efficient testing techniques for RF systems and components. Further, the characterization of the individual building blocks is desirable to detect parametric faults, improve the fault coverage and accelerate the product development phase. Towards this end, Built-in-Self-Test (BIST) techniques are very useful. This project tackles the challenge of designing a full-CMOS implementation of the RMS detector for RF frequencies. It consists of three main stages: The target frequency of operation for this design is 2.4 GHz, since this is the ISM band employed by widely used wireless standards such as Bluetooth, Wi-Fi and Zigbee. The following picture shows the input-output characteristic of the RMS detector and its input impedance as a function of operating frequency: TRANSFER CHARACTERISTIC INPUT IMPEDANCE TRANSCEIVER TESTING THROUGH ON-CHIP RMS DETECTION: A typical transceiver with possible test points is shown below: On-chip RMS detector connected at various strategic test points as shown above can enable functional verification of the RF blocks in the system using a low-cost-tester and/or analog-to-digital conversion and digital processing circuitry available on-chip. Multiple nodes can be observed from a single output pad since DC voltages can be easily multiplexed. The main performance metrics such as gain, output power and 1-dB compression pint can be tested with reasonable accuracy by measuring DC voltages. The following table summarizes the performance achieved so far: STATUS: An attempt is being made to test a Low Noise Amplifier at 2.4 GHz for its power gain and 1-dB compression point using the RMS detector in CMOS 0.35μ m technology.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A CMOS RF Power Detector Using an Improved Unbalanced Source Coupled Pair

This paper presents the design of a CMOS RF Power Detector (PD) using 0.18 μm standard CMOS technology. The PD is an improved unbalanced source coupled pair incorporating an output differential amplifier and sink current steering. It realizes an input detectable power range of −30 to −20 dBm over 0.1–1 GHz. Also it shows a maximum data rate of 30 Mbps with 2 pF output loading under OOK modulati...

متن کامل

A Hysteretic Two-phase Supply Modulator for Envelope Tracking RF Power Amplifiers

In this paper a two-phase supply modulator suitable for envelope tracking power amplifier is presented. The designed supply modulator has the linear assisted switching architecture. Two-phase architecture is used in order to reduce the output switching ripples. The proposed architecture uses hysteretic control instead of pulse width modulation (PWM) which significantly reduces the circuit compl...

متن کامل

Design of High Speed, Low Power and Wide range Ripple Detector for On-Chip testing in CMOS Technology

On chip testing is an attractive solution for testing of analog integrated circuits. In this paper a low power , built in CMOS Ripple Detector is presented for the purpose of detecting the ripples in the supply rails and specifies its application for On chip testing. The detector works on the principle of RMS detection. The circuit outputs a DC signal that is proportional to the peak to peak am...

متن کامل

A 39 dB DR CMOS Log-Amp RF Power Detector with ± 1.1 dB Temperature Drift from -40 to 85°C

This paper presents a temperature compensated logarithmic amplifier (log-amp) RF power detector implemented in CMOS 0.18μm technology. The input power can range from -50 to +10 dBm for RF signals ranging from 100 MHz to 1.5 GHz. This design attains a typical DR of 39 dB for a ±1 dB logconformance error (LCE). Up to 900 MHz the temperature drift is never larger than ±1.1 dB for all 24 measured s...

متن کامل

ISSCC 2007 / SESSION 17 / ANALOG TECHNIQUES AND PLLs / 17 . 2 17 . 2 A 0 . 65 V 2 . 5 GHz Fractional - N Frequency

For extremely-scaled CMOS technologies, supply voltages well below 1V will be required to maintain reliability [1]. Analog and RF design with standard devices then becomes very challenging because of the significant reduction in both the available signal swing and the available overdrive for biasing. We present ultralow-voltage design techniques that maintain all node voltages between the suppl...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2005